SK hynix HY57V281620ETP-H


 * SK hynix HY57V281620E chips datasheet
 * 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O


 * Clock Frequency: 133MHz (H)
 * Interface: LVTTL
 * Package: 54 Pin TSOPII
 * 0.8mm pin pitch


 * Lead Free (TP)
 * 22mm x 10mm


 * Number of Data Pins: 16
 * Number of Address Pins: 12
 * Number of Bank Pins: 2
 * Rows: 12
 * Collumns: 9


 * decoding HY57V281620E(L)T(P)-H:


 * last char: H - 133MHz; 7 - 143MHz;
 * 6 - 166MHz; 5 - 200MHz


 * P - lead free
 * L - Low power