Philips

This page covers the following companies: Systemonic → Philips → NXP → Qualcomm

Philips

 * Philips first offered WLAN RFIC's for use with other chipsets.
 * It then developed its own 802.11b chipset, used in Philips 1st and 2nd generation.


 * Later it acquired Systemonic in 2003 for its 802.11abg chipset,
 * and started offering 802.11abg chipset based on Systemonic chipset/IP.

Timeline

 * 1999: Systemonic founded.
 * 2003: Philips acquires Systemonic (802.11abg chipset).
 * 2006: Philips Wi-Fi assets are spun-off to NXP Semiconductors.
 * 2015: NXP merged with Freescale (NXP and Freescale announce merger)
 * On the 2 March 2015, it was revealed that NXP will acquire Freescale.


 * 2016: Qualcomm acquired NXP (Qualcomm to acquire NXP).

Before 1st generation

 * SA2400A - 2.4GHz Low-voltage RF transceiver, just a RFIC (ABE/BBE)
 * Used with Wi-Fi chipsets from other vendors, such as ZyDAS ZD1201


 * SA1630 - IF Quadrature transceiver
 * Philips SA1630BE (LQFP-48)


 * MA1021 - Low-voltage frequency synthesizer (900MHz/2GHz)
 * Philips UMA1021M (BiCMOS, SSOP16)

First generation

 * BGW100 RF SiP:
 * SA2405 - RFIC transceiver (500nm BiCMOS)
 * SA2411 - optional RFPA (+19dBm)


 * SA2443 - MAC/BB 802.11b (180nm CMOS)

Second generation

 * BGW200 - SiP 802.11b
 * SA2420 - 2.4GHz Low-voltage RF transceiver (w/ LNA + mixer)
 * Philips SA2420DH (TSSOP24)

Third generation
Philips third-generation Wi-Fi chipsets are basically relabeled Systemonic chipsets, after acquisition.
 * SA5250 - MAC/BB 802.11abg
 * SA5251 - 2.4G + 5G RFIC
 * SA2451 - 2.4G-only RFIC

Systemonic

 * Systemonic home page: systemonic.com
 * Founded in 1999; acquired by Philips in 2003 • News


 * HiperSonic 1 - first generation - 802.11a + HiperLAN/2
 * (unsuccessful WLAN standard, PHY similar to 802.11a)
 * H01 - Baseband Processor


 * Tondelayo chipset - second generation - 802.11abg
 * SBB1001 - MAC/BB
 * SRF1001 - RFIC

Poseidon
The Poseidon family of SoCs was originally developed by Philips then transfered over to NXP.
 * Poseidon SoC on Linux-MIPS Wiki


 * PR31100 is a single-chip, low-cost, integrated embedded processor.
 * PR31100 consists of a 40MHz R3000 3.3V static CMOS CPU with 4K Instruction/1K Data cache memory, without MMU,
 * multiple DMA channels and a high-performance and flexible Bus Interface Unit (BIU) and external I/O modules.


 * PR31500 - Poseidon v1.0
 * PR31500 is a 37MHz R3000 3.3V static CMOS CPU with R3000A TLB and 4K Instrution/1K Data cache.
 * PR31500 also contains multi-channel DMA controller, ROM, Flash, RAM, DRAM, SDRAM, SRAM,
 * and PCMCIA controller and Dual-UART, SPI and High-speed serial interface controllers.
 * Philips licensed a version of Toshiba's R3900 MIPS RISC processor core for the PR31500.


 * • TwoChipPIC chipset consists of the PR31500 microcontroller and the UCB1100 analog interface chip.
 * The UCB1100 provides a 12-bit audio codec and a 14-bit modem codec, a touchscreen interface,
 * and a 10-bit A/D converter for measuring battery voltages and other analog inputs.


 * PR31700 - Poseidon v1.5
 * The PR31700 is a 75MHz R3000 (PR3901 Processor Core) with MMU, 4K Instruction/1K Data cache.
 * PR31700 also contains multi-channel DMA controller, ROM, Flash, RAM, DRAM, SDRAM, SRAM, and
 * PCMCIA controller. It is also identical to the Toshiba 3912 processor from the TX39XX family.
 * It is pretty clear that Philips licensed or bought this core directly from Toshiba.


 * • The TwoChipPIC Plus chipset consists of Philips PR31700 and UCB1200 analog chip.
 * The datasheet can be found here