Beeline SmartBox Turbo+/Serial info

{{SCollapse|Bootlog • >> MT7621  stage1 code 10:33:11 (ASIC) CPU=50000000 HZ BUS=16666666 HZ

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===================================================== Change MPLL source from XTAL to CR... do MEMPLL setting.. MEMPLL Config : 0x11100000 3PLL mode + External loopback

XTAL-40Mhz
DDR-1200Mhz === PLL3 FB_DL: 0x0, 1/0 = 952/72 01000000 PLL4 FB_DL: 0xe, 1/0 = 534/490 39000000 PLL2 FB_DL: 0x15, 1/0 = 600/424 55000000 do DDR setting..[00320381] Apply DDR3 Setting...(use customer AC) 0   8   16   24   32   40   48   56   64   72   80   88   96  104  11                                                                              2  120      --                                                                              -- 0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 000B:|   0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 000C:|   0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 000D:|   0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 000E:|   0    0    0    0    0    0    0    0    0    0    0    1    1    1                                                                                  1    1 000F:|   0    0    0    0    0    0    1    1    1    1    1    1    1    1                                                                                  1    1 0010:|   1    1    1    1    1    1    1    1    1    1    1    0    0    0                                                                                  0    0 0011:|    1    1    1    1    1    0    0    0    0    0    0    0    0    0                                                                                  0    0 0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 001B:|   0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 001C:|   0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 001D:|   0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 001E:|   0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 001F:|   0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                  0    0 rank 0 coarse = 16 rank 0 fine = 40 B:|   0    0    0    0    0    0    0    0    1    1    1    0    0    0    0                                                                                  0 opt_dle value:9 DRAMC_R0DELDLY[018]=00002121

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=====================================================               RX      DQS perbit delay software calibration

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===================================================== 1.0-15 bit dq delay value

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===================================================== bit|    0  1  2  3  4  5  6  7  8  9 -- 0 |   12 6 13 9 11 6 13 5 1 11 10 |    6 12 7 11 5 10 --

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===================================================== 2.dqs window x=pass dqs delay value (min~max)center y=0-7bit DQ of every group input delay:DQS0 =33 DQS1 = 33

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===================================================== bit    DQS0     bit      DQS1 0 (1~63)32  8  (1~60)30 1  (1~61)31  9  (1~63)32 2  (1~64)32  10  (2~65)33 3  (1~60)30  11  (1~61)31 4  (1~62)31  12  (1~65)33 5  (1~64)32  13  (1~63)32 6  (1~64)32  14  (1~65)33 7  (1~66)33  15  (1~62)31

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===================================================== 3.dq delay value last

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===================================================== bit|   0  1  2  3  4  5  6  7  8   9 -- 0 |   13 8 14 12 13 7 14 5 4 12 10 |    6 14 7 12 5 12

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=====================================================

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=====================================================    TX  perbyte calibration

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===================================================== DQS loop = 15, cmp_err_1 = ffff0000 dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1 dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2 DQ loop=15, cmp_err_1 = ffff0080 dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=1 DQ loop=14, cmp_err_1 = ffff0000 dqs_perbyte_dly.last_dqdly_pass[0]=14, finish count=2 byte:0, (DQS,DQ)=(8,8) byte:1, (DQS,DQ)=(8,8) 20,data:88 [EMI] DRAMC calibration passed

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======================================================               MT7621   stage1 code done CPU=50000000 HZ BUS=16666666 HZ

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======================================================

U-Boot 1.1.3 (Mar 6 2018 - 19:39:59)

Board: Ralink APSoC DRAM: 128 MB rt2880 uboot v0.00e04 05/25/2006 SERIAL_CLOCK_DIVISOR =16 kaiker,,CONFIG_BAUDRATE =57600 SDRAM SIZE:08000000 Top of RAM usable for U-Boot at: 88000000 Reserving 426k for U-Boot at: 87f94000 Reserving 1028k for malloc at: 87e93000 Reserving 44 Bytes for Board Info at: 87e92fd4 Reserving 36 Bytes for Global Data at: 87e92fb0 Reserving 128k for boot params at: 87e72fb0 Stack Pointer at: 87e72f98 relocate_code Pointer at: 87f94000

Config XHCI 40M PLL Now running in RAM - U-Boot at: 87f94000

monitor_flash_len =117844 Command "mdio": 0xa0206b28 => 0x87f9ab28 Command "nand": 0xa020c460 => 0x87fa0460 Command "reset": 0xa0215ecc => 0x87fa9ecc Command "go": 0xa020de0c => 0x87fa1e0c Command "bootm": 0xa020e668 => 0x87fa2668 Command "loadb": 0xa020f328 => 0x87fa3328 Command "tftpboot": 0xa020f958 => 0x87fa3958 Command "nm": 0xa020ffe4 => 0x87fa3fe4 Command "mm": 0xa0210048 => 0x87fa4048 Command "md": 0xa02100ac => 0x87fa40ac Command "saveenv": 0xa0210624 => 0x87fa4624 Command "setenv": 0xa0210f94 => 0x87fa4f94 Command "printenv": 0xa0210674 => 0x87fa4674 Command "?": 0xa0211268 => 0x87fa5268 Command "help": 0xa0211268 => 0x87fa5268 Command "version": 0xa0211128 => 0x87fa5128 Command "sc_boot": 0xa0213ed4 => 0x87fa7ed4 Command "sc_nand": 0xa0213f0c => 0x87fa7f0c Command "sc_eth_test": 0xa0213f48 => 0x87fa7f48 Command "sc_phy": 0xa0213f84 => 0x87fa7f84 Command "sc_time": 0xa0213fc0 => 0x87fa7fc0 Command "sc_btver": 0xa0213ff8 => 0x87fa7ff8 Command "sc_fl_map": 0xa0214034 => 0x87fa8034 Command "sc_endian": 0xa0214070 => 0x87fa8070 Command "sc_ramtest": 0xa02140ac => 0x87fa80ac Command "sc_gpio": 0xa02140e8 => 0x87fa80e8 Command "sc_led": 0xa0214124 => 0x87fa8124 Command "sc_dl": 0xa0214160 => 0x87fa8160 Allocate 16 byte aligned buffer: 87fca810 Enable NFI Clock NAND ID [C2 F1 80 95 02] Device found in MTK table, ID: c2f1, EXT_ID: 809502 Support this Device in MTK table! c2f1 select_chip [NAND]select ecc bit:4, sparesize :64 spare_per_sector=16 Signature matched and data read! load_fact_bbt success 1023 load fact bbt success [mtk_nand] probe successfully! mtd->writesize=2048 mtd->oobsize=64,   mtd->erasesize=131072  devinfo.iowidth=8
 * 1) MTK NAND # : Use HW ECC
 * Warning - bad CRC, using default environment

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=============================== Ralink UBoot Version: 5.0.0.0

ASIC MT7621A DualCore (MAC to MT7530 Mode) DRAM_CONF_FROM: Auto-Detection DRAM_TYPE: DDR3 DRAM bus: 16 bit Xtal Mode=3 OCP Ratio=1/3 Flash component: NAND Flash Date:Mar 6 2018  Time:19:39:59

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=============================== icache: sets:256, ways:4, linesz:32 ,total:32768 dcache: sets:256, ways:4, linesz:32 ,total:32768

estimate memory size =128 Mbytes set LAN/WAN WLLLL
 * 1) The CPU freq = 880 MHZ ####
 * 1) Reset_MT7530

Load Standalone from 40000 SC_DEBUG: Nand Partition Table Magic Found at 100000.

Uboot StandAlone Entry GPIO init Press any key to enter Boot Command Interface SC_DEBUG: Nand Partition Table Magic Found at 100000.
 * 0

Uboot StandAlone Entry

Sercomm Boot Version 2.0.0.0, at Mar 6 2018, 19:39:56

SC_DEBUG: Nand Partition Table Magic Found at 100000. Entering Firmware : Everything is OK.

Boot Flag : Sercomm1-

Kernel image header: Image Addr:    00A00100 Image Len:     003A9C2F Image CRC:     18227026 Start to calculate kernel_crc from 0x00a00100 .... Bad block detected at 0xa80000, first byte of oob is 0x00 Bad block detected at 0xac0000, first byte of oob is 0x00 Kernel CRC verify OK! Kernel Addr : 0xbca00100 Image Name:  Linux Kernel Image Image Type:  MIPS Linux Kernel Image (lzma compressed) Data Size:   3841007 Bytes =  3.7 MB   Load Address: 81001000 Entry Point: 8162c9e0 ranand_read: skip reading a fact bad block a80000 -> aa0000 ranand_read: skip reading a fact bad block ac0000 -> ae0000 Verifying Checksum ... OK  Uncompressing Kernel Image ... OK boot_count2 is FF write 1 to boot_count2 ranand_erase: start:320000, len:20000 .kernel addr :0xBCA00100 No initrd
 * 1) Booting image at bca00100 ...
 * 1) Transferring control to Linux (at address 8162c9e0) ...
 * 2) Giving linux memsize in MB, 128

Starting kernel ...

LINUX started...

THIS IS ASIC

SDK 5.0.S.0 Linux version 3.10.14+ (phil@ubuntu) (gcc version 4.6.3 (Buildroot 2012.11.1) ) ... }}