Arris TM802G
From TechInfoDepot
Jump to navigationJump to search| cable modem, analog phone gateway | |
| Homepage | |
|---|---|
| WikiDevi.wi-cat.ru | |
| 3rd Party Firmware | |
| dd-wrt |
Status Unknown |
| OpenWrt |
Status Unknown |
| Tomato any flavor |
Incompatible |
| Platform | |
| Brand • Model • Rev |
Arris TM802G |
| Type |
cable modem, analog phone gateway |
| CPU1 |
Intel Puma DNCE2510 |
| CPU1 Type |
ARMv6 ARMv6TEJ |
| CPU1 Speed |
not specified ( 2 cores ) |
| Flash1 Chip |
Brand? Model? |
| Flash1 Size |
16 MiB16,777,216 B <br />131,072 Kib <br />16,384 KiB <br />128 Mib <br />0.0156 GiB <br /> |
| RAM1 Size |
64 MiB67,108,864 B <br />524,288 Kib <br />65,536 KiB <br />512 Mib <br />0.0625 GiB <br /> |
| RAM1 Chip |
Brand? Model? |
| ETH chip1 |
Intel Puma DNCE2510 |
| ETH chip2 |
Marvell 88E1119R |
| Cable Modem Spec |
DOCSIS 3.0: (8 x 4) |
| Ethernet Port Count |
1-1GbE-LAN |
| Wired Standard |
IEEE 802.3i/3u/3ab |
| Stock bootloader |
U-Boot 1.2.1.62 PSPU-Boot |
| Stock FW OS |
Linux |
| Expansion IF types |
none specified |
| Power |
115-240 VAC ~ 50/60 Hz, 0.5 A |
| Connector type |
C7P |
| Serial Port (UART) |
yes, internal, 4-pin header, 3.3V TTL, J1 |
| JTAG Port |
probably, internal, 10-pin header, P801 |
|
Flags: DOCSIS 3.0, Coax F-connector | |
| Other | |
|
Default IP address: 192.168.100.1 | |
| Retail | |
| (Est.) release date | 2011 |
| Country of manuf | China |
For a list of all currently documented Intel Puma SoC's with specifications, see Intel Puma.
For a list of all currently documented Marvell chipsets with specifications, see Marvell.
For a list of all currently documented Arris device with specifications, see Arris.
Overview
TM802 supports
- DOCSIS 3.0 compliant
- PacketCable 1.0 and 1.5 compliant
- PacketCable 2.0 BASIC compliant
- Flexible 8x4 downstream/upstream channel-bonding
- Backwards compatible with DOCSIS 1.0, 1.1, and 2.0
Links of Interest
JTAG-Serial Info
Serial
Serial Pinouts
There's a serial header @ J1.
(GND) (RxD) (TxD) [3.3] J1 to tuner
