TP-LINK TL-ER5120

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Gigabit Load Balance Broadband Router
ER5120正面 large 1541644022843h.jpg
Homepage
Wikipedia
WikiDevi.wi-cat.ru
3rd Party Firmware
dd-wrt
Status Unknown
OpenWrt
Status Unknown
Tomato any flavor
Incompatible
Platform
BrandModelRev
TP-LINK TL-ER5120 v1.3
Board ID
2021500120
Type
router
CPU1 checkY
Cavium CN5010
CPU1 Type
MIPS64 OCTEON Plus
CPU1 Speed
500 MHz
Flash1 Chip
STMicro M29W640GB-70NA6
Flash1 Size
8 MiB8,388,608 B <br />65,536 Kib <br />8,192 KiB <br />64 Mib <br />0.00781 GiB <br />
RAM1 Size
128 MiB134,217,728 B <br />1,048,576 Kib <br />131,072 KiB <br />1,024 Mib <br />0.125 GiB <br />
RAM1 Chip
SK hynix H5PS5162GFR-Y5C x 2
ETH chip1
Cavium CN5010
Switch
Broadcom BCM53115S
Ethernet Port Count
1-1GbE-WAN
4-1GbE-LAN
Wired Standard
IEEE 802.3i/3u/3ab

Ethernet OUI: 90:F6:52 (8 E, 10 W)

Expansion IF types
none specified
Power
100-240 VAC ~ 50/60 Hz, 0.6 A
Connector type
C13
Serial Port (UART)
yes, RJ45 console, (115200 8N1)
JTAG Port
yes, 14-pad header, J1
Flags:
heatsink, metal case, SNMP

Additional chips
Low Power 3-5.5V, 250kbps RS232 Transceiver;Zywyn;ZT1385;;1;
3-State Octal Bus Transceiver;NXP;74LVC245A;;2;
5-12V Synchronous Buck PWM Controller;ANPEC;APW7120;;5;
30V, 6.8A N-Channel Power MOSFET;Advanced Power Electronics;AP4228GM;;5;
30V, 30A N-Channel Power MOSFET;ANPEC;APM3023N;;1;
3A Bus Termination Regulator;Richtek;RT9173;;1;,

Other

Default IP address: 192.168.0.1
the IP 192.168.0.1 is used by 816 additional devices
of which 107 are TP-LINK devices
Default login user: admin
Default login password: admin
admin:admin credentials used by 1347 additional devices
of which 282 are TP-LINK devices

Retail
Availability End of Life
Country of manuf China

For a list of all currently documented Broadcom chipsets with specifications, see Broadcom.
For a list of all currently documented Cavium (Star) SoC's with specifications, see Cavium.

For a list of all currently documented TP-LINK device with specifications, see TP-LINK.

Overview

Specifications

  • Cavium OCTEON CN50XX Single Core MIPS64
RISC 64-bit @500MHz Embedded Processors
16KB Instruction Cache
8KB Data Cache
2KB Write Cache
128KB L2 Cache

Pictures

User Images