Xtensa

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Tensilica Xtensa CPU

The Tensilica Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core.

Processor and SOC vendors can select from various processor options and even create customized instructions
in addition to a base ISA to tailor the processor for a particular application.

Tensilica Xtensa LX2

"SANTA CLARA, CA, – December 4, 2006 – Tensilica, Inc. today introduced its seventh-generation of Xtensa configurable processors, the Xtensa LX2 and Xtensa 7 cores. Both processors feature several architectural enhancements, and are the first configurable licensable core families available with built-in, on-the-fly Error Correcting Code (ECC), which is extremely important in storage, networking, automotive and transaction processing applications where data integrity and error resiliency are of paramount concern. Tensilica’s new generation of processors reinforce Tensilica’s processor technology leadership by remaining the lowest power, highest performance licensable cores on the market. Both processors are available and shipping now.

"We’ve made several architectural improvements that enhance our leadership both with our Xtensa 7 our Xtensa LX2 configurable, extensible processors," stated Chris Rowen, Tensilica’s president and CEO. "Tensilica offers more configuration options and a much more automated process of generating both the hardware RTL and the matching software tool chain than anyone in the industry."

Tensilica Xtensa LX3

Tensilica Xtensa Diamond

"SANTA CLARA, Calif. – November 5, 2007 – Tensilica, Inc. today unveiled the industry's smallest licensable 32-bit processor core based on an industry-standard architecture. The new Diamond Standard 106Micro core takes up only 0.26mm2 in a 130-nm G process and only 0.13mm2 in a 90-nm G process, which makes it smaller than the ARM7 or Cortex-M3 cores, yet at 1.22 Dhrystone MIPS/MHz, it delivers higher performance than the ARM9E cores.

The low-power Diamond Standard 106Micro is designed for simple controller applications in SoC (system-on-chip) designs, and an ideal choice for designers migrating from 8-bit and 16-bit microcontrollers to 32-bit processors. All Diamond Standard processors are supported by an optimized set of Diamond Standard software tools and a wide range of industry infrastructure partners, who provide support with operating systems, design services, hardware prototyping and emulation, libraries and memories, EDA tools, and peripherals.

"In many SOC applications, the smallest possible microcontroller is all that's needed to coordinate the various tasks being performed on the chip," explained Chris Rowen, Tensilica's president and CEO. "And often in devices that already have one or more other heavyweight applications processors on chip, one or more subsystems need a low-power, low-cost, localized controller. By leveraging our core configurable processor technology, we were able to quickly create this new core with the smallest footprint in the industry."

Diamond Controller Cores:

  • 106Micro - Smallest 32-bit, ultra-low power, cache-less RISC controller with local memories.
  • 108Mini - Ultra-low power, cacheless controller core with rich interrupt architecture,
minimal gate count for lowest silicon cost.
  • 212GP - Flexible mid-range controller core with instruction and data caches and
user-defined local memory sizes

Diamond CPU Cores:

  • 232L - Flexible mid-range CPU with a Memory-Management Unit (MMU) for Linux OS support
  • 570T - Extremely high-performance, 2- or 3-issue static superscalar processor.

Devices

Notes

  • There is confusion about real core used by Espressif ESP8266.
According to the Espressif documentation: Datasheet

"Besides the Wi-Fi functionalities, ESP8266EX also integrates an enhanced version

of Tensilica’s L106 Diamond series 32-bit processor and on-chip SRAM."

Which is most probably custom version of "Xtensa Diamond 106Micro"

See also